/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
/*
 * Copyright 2023 NXP
 */

#ifndef S32R45_GPR_NVMEM_H
#define S32R45_GPR_NVMEM_H

#define S32R45_GPR_GMAC1_PHY_INTF_SEL_OFFSET	0x100

#define S32R45_GPR_CELL_SIZE			0x4

#endif
